Information

10.4.7 Communication Interfaces
Table 10-25. USB FS OTG Signal Descriptions
Chip signal name Module signal
name
Description I/O
USB0_DM usb_dm USB D- analog data signal on the USB bus. I/O
USB0_DP usb_dp USB D+ analog data signal on the USB bus. I/O
USB_CLKIN — Alternate USB clock input I
Table 10-26. USB VREG Signal Descriptions
Chip signal name Module signal
name
Description I/O
VOUT33 reg33_out Regulator output voltage O
VREGIN reg33_in Unregulated power supply I
Table 10-27. CAN 0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
CAN0_RX CAN Rx CAN Receive Pin Input
CAN0_TX CAN Tx CAN Transmit Pin Output
Table 10-28. SPI 0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
SPI0_PCS0 PCS0/SS Peripheral Chip Select 0 output I/O
SPI0_PCS[3:1] PCS[3:1] Peripheral Chip Select 1 – 3 O
SPI0_PCS4 PCS4 Peripheral Chip Select 4 O
SPI0_SIN SIN Serial Data In I
SPI0_SOUT SOUT Serial Data Out O
SPI0_SCK SCK Master mode: Serial Clock (output) I/O
Table 10-29. SPI 1 Signal Descriptions
Chip signal name Module signal
name
Description I/O
SPI1_PCS0 PCS0/SS Peripheral Chip Select 0 output I/O
SPI1_PCS[3:1] PCS[3:1] Peripheral Chip Select 1 – 3 O
SPI1_SIN SIN Serial Data In I
SPI1_SOUT SOUT Serial Data Out O
SPI1_SCK SCK Master mode: Serial Clock (output) I/O
Chapter 10 Signal Multiplexing and Signal Descriptions
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
233
General Business Information