Information

Table 10-30. I
2
C 0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
I2C0_SCL SCL Bidirectional serial clock line of the I
2
C system. I/O
I2C0_SDA SDA Bidirectional serial data line of the I
2
C system. I/O
Table 10-31. I
2
C 1 Signal Descriptions
Chip signal name Module signal
name
Description I/O
I2C1_SCL SCL Bidirectional serial clock line of the I
2
C system. I/O
I2C1_SDA SDA Bidirectional serial data line of the I
2
C system. I/O
Table 10-32. UART 0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
UART0_CTS CTS Clear to send I
UART0_RTS RTS Request to send O
UART0_TX TXD Transmit data O
UART0_RX RXD Receive data I
UART0_COL Collision Collision detect I
Table 10-33. UART 1 Signal Descriptions
Chip signal name Module signal
name
Description I/O
UART1_CTS CTS Clear to send I
UART1_RTS RTS Request to send O
UART1_TX TXD Transmit data O
UART1_RX RXD Receive data I
Table 10-34. UART 2 Signal Descriptions
Chip signal name Module signal
name
Description I/O
UART2_CTS CTS Clear to send I
UART2_RTS RTS Request to send O
UART2_TX TXD Transmit data O
UART2_RX RXD Receive data I
Module Signal Description Tables
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
234
Preliminary
Freescale Semiconductor, Inc.
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