Information

PORTx_PCRn field descriptions (continued)
Field Description
2
SRE
Slew Rate Enable
This bit is read only for pins that do not support a configurable slew rate.
Slew rate configuration is valid in all digital pin muxing modes.
0 Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output.
1 Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output.
1
PE
Pull Enable
This bit is read only for pins that do not support a configurable pull resistor.
Pull configuration is valid in all digital pin muxing modes.
0 Internal pullup or pulldown resistor is not enabled on the corresponding pin.
1 Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a
digital input.
0
PS
Pull Select
This bit is read only for pins that do not support a configurable pull resistor direction.
Pull configuration is valid in all digital pin muxing modes.
0 Internal pulldown resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable
field is set.
1 Internal pullup resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable field
is set.
11.14.2 Global Pin Control Low Register (PORTx_GPCLR)
Only 32-bit writes are supported to this register.
Address: Base address + 80h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 0
W
GPWE GPWD
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PORTx_GPCLR field descriptions
Field Description
31–16
GPWE
Global Pin Write Enable
Selects which Pin Control Registers (15 through 0) bits [15:0] update with the value in GPWD. If a
selected Pin Control Register is locked then the write to that register is ignored.
0 Corresponding Pin Control Register is not updated with the value in GPWD.
1 Corresponding Pin Control Register is updated with the value in GPWD.
15–0
GPWD
Global Pin Write Data
Write value that is written to all Pin Control Registers bits [15:0] that are selected by GPWE.
Chapter 11 Port control and interrupts (PORT)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
247
General Business Information