Information

PORTx_ISFR field descriptions (continued)
Field Description
0 Configured interrupt is not detected.
1 Configured interrupt is detected. If the pin is configured to generate a DMA request, then the
corresponding flag will be cleared automatically at the completion of the requested DMA transfer.
Otherwise, the flag remains set until a logic one is written to the flag. If the pin is configured for a level
sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is
cleared.
11.1.5 Functional description
11.1.5.1 Pin control
Each port pin has a corresponding pin control register, PORT_PCRn, associated with it.
The upper half of the pin control register configures the pin's capability to either interrupt
the CPU or request a DMA transfer, on a rising/falling edge or both edges as well as a
logic level occurring on the port pin. It also includes a flag to indicate that an interrupt
has occurred.
The lower half of the pin control register configures the following functions for each pin
within the 32-bit port.
• Pullup or pulldown enable on selected pins
• Drive strength and slew rate configuration on selected pins
• Open drain enable on selected pins
• Passive input filter enable on selected pins
• Pin Muxing mode
The functions apply across all digital Pin Muxing modes and individual peripherals do
not override the configuration in the pin control register. For example, if an I
2
C function
is enabled on a pin, that does not override the pullup or open drain configuration for that
pin.
When the Pin Muxing mode is configured for analog or is disabled, all the digital
functions on that pin are disabled. This includes the pullup and pulldown enables, digital
output buffer enable, digital input buffer enable, and passive filter enable.
A lock field also exists that allows the configuration for each pin to be locked until the
next system reset. When locked, writes to the lower half of that pin control register are
ignored, although a bus error is not generated on an attempted write to a locked register.
Chapter 11 Port control and interrupts (PORT)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
249
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