Information

SIM_SCGC1 field descriptions (continued)
Field Description
23–22
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
21
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
20–12
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
11
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
10
UART4
UART4 Clock Gate Control
This bit controls the clock gate to the UART4 module.
0 Clock disabled
1 Clock enabled
9–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
7
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
5–0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
12.2.9 System Clock Gating Control Register 2 (SIM_SCGC2)
Address: 4004_7000h base + 102Ch offset = 4004_802Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 0
DAC0
0 0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
268
Preliminary
Freescale Semiconductor, Inc.
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