Information

Section number Title Page
33.8 CMP functional description..........................................................................................................................................776
33.8.1 CMP functional modes.................................................................................................................................776
33.8.2 Power modes................................................................................................................................................785
33.8.3 Startup and operation...................................................................................................................................786
33.8.4 Low-pass filter.............................................................................................................................................787
33.9 CMP interrupts..............................................................................................................................................................789
33.10 CMP DMA support.......................................................................................................................................................789
33.11 Digital-to-analog converter block diagram...................................................................................................................790
33.12 DAC functional description..........................................................................................................................................790
33.12.1 Voltage reference source select....................................................................................................................790
33.13 DAC resets....................................................................................................................................................................791
33.14 DAC clocks...................................................................................................................................................................791
33.15 DAC interrupts..............................................................................................................................................................791
Chapter 34
12-bit Digital-to-Analog Converter (DAC)
34.1 Introduction...................................................................................................................................................................793
34.2 Features.........................................................................................................................................................................793
34.3 Block diagram...............................................................................................................................................................793
34.4 Memory map/register definition...................................................................................................................................794
34.4.1 DAC Data Low Register (DACx_DATnL).................................................................................................795
34.4.2 DAC Data High Register (DACx_DATnH)................................................................................................796
34.4.3 DAC Status Register (DACx_SR)...............................................................................................................796
34.4.4 DAC Control Register (DACx_C0).............................................................................................................797
34.4.5 DAC Control Register 1 (DACx_C1)..........................................................................................................798
34.4.6 DAC Control Register 2 (DACx_C2)..........................................................................................................799
34.5 Functional description...................................................................................................................................................799
34.5.1 DAC data buffer operation...........................................................................................................................799
34.5.2 DMA operation............................................................................................................................................801
34.5.3 Resets...........................................................................................................................................................801
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
28
Preliminary
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