Information

If the MCU is configured for a disallowed or reserved power mode, the MCU remains in
its current power mode. For example, if the MCU is in normal RUN mode and AVLP is
0, an attempt to enter VLPR mode using PMCTRL[RUNM] is blocked and the RUNM
bits remain 00b, indicating the MCU is still in Normal Run mode.
NOTE
This register is reset on Chip Reset not VLLS and by reset
types that trigger Chip Reset not VLLS. It is unaffected by reset
types that do not trigger Chip Reset not VLLS. See the Reset
section details for more information.
Address: 4007_E000h base + 0h offset = 4007_E000h
Bit 7 6 5 4 3 2 1 0
Read 0
AVLP
0
ALLS
0
AVLLS
0
Write
Reset
0 0 0 0 0 0 0 0
SMC_PMPROT field descriptions
Field Description
7–6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
5
AVLP
Allow Very-Low-Power Modes
Provided the appropriate control bits are set up in PMCTRL, this write-once bit allows the MCU to enter
any very-low-power modes: VLPR, VLPW, and VLPS.
0 VLPR, VLPW and VLPS are not allowed
1 VLPR, VLPW and VLPS are allowed
4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3
ALLS
Allow Low-Leakage Stop Mode
This write once bit allows the MCU to enter any low-leakage stop mode (LLS), provided the appropriate
control bits are set up in PMCTRL.
0 LLS is not allowed
1 LLS is allowed
2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
1
AVLLS
Allow Very-Low-Leakage Stop Mode
Provided the appropriate control bits are set up in PMCTRL, this write once bit allows the MCU to enter
any very-low-leakage stop mode (VLLSx).
0 Any VLLSx mode is not allowed
1 Any VLLSx mode is allowed
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Memory map and register descriptions
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
298
Preliminary
Freescale Semiconductor, Inc.
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