Information

AIPS memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4000_0000 Master Privilege Register A (AIPS0_MPRA) 32 R/W Undefined 19.2.1/366
4000_0020 Peripheral Access Control Register (AIPS0_PACRA) 32 R/W 4444_4444h 19.2.2/368
4000_0024 Peripheral Access Control Register (AIPS0_PACRB) 32 R/W 4444_4444h 19.2.2/368
4000_0028 Peripheral Access Control Register (AIPS0_PACRC) 32 R/W 4444_4444h 19.2.2/368
4000_002C Peripheral Access Control Register (AIPS0_PACRD) 32 R/W 4444_4444h 19.2.2/368
4000_0040 Peripheral Access Control Register (AIPS0_PACRE) 32 R/W Undefined 19.2.3/373
4000_0044 Peripheral Access Control Register (AIPS0_PACRF) 32 R/W Undefined 19.2.3/373
4000_0048 Peripheral Access Control Register (AIPS0_PACRG) 32 R/W Undefined 19.2.3/373
4000_004C Peripheral Access Control Register (AIPS0_PACRH) 32 R/W Undefined 19.2.3/373
4000_0050 Peripheral Access Control Register (AIPS0_PACRI) 32 R/W Undefined 19.2.3/373
4000_0054 Peripheral Access Control Register (AIPS0_PACRJ) 32 R/W Undefined 19.2.3/373
4000_0058 Peripheral Access Control Register (AIPS0_PACRK) 32 R/W Undefined 19.2.3/373
4000_005C Peripheral Access Control Register (AIPS0_PACRL) 32 R/W Undefined 19.2.3/373
4000_0060 Peripheral Access Control Register (AIPS0_PACRM) 32 R/W Undefined 19.2.3/373
4000_0064 Peripheral Access Control Register (AIPS0_PACRN) 32 R/W Undefined 19.2.3/373
4000_0068 Peripheral Access Control Register (AIPS0_PACRO) 32 R/W Undefined 19.2.3/373
4000_006C Peripheral Access Control Register (AIPS0_PACRP) 32 R/W Undefined 19.2.3/373
4008_0000 Master Privilege Register A (AIPS1_MPRA) 32 R/W Undefined 19.2.1/366
4008_0020 Peripheral Access Control Register (AIPS1_PACRA) 32 R/W 4444_4444h 19.2.2/368
4008_0024 Peripheral Access Control Register (AIPS1_PACRB) 32 R/W 4444_4444h 19.2.2/368
4008_0028 Peripheral Access Control Register (AIPS1_PACRC) 32 R/W 4444_4444h 19.2.2/368
4008_002C Peripheral Access Control Register (AIPS1_PACRD) 32 R/W 4444_4444h 19.2.2/368
4008_0040 Peripheral Access Control Register (AIPS1_PACRE) 32 R/W Undefined 19.2.3/373
4008_0044 Peripheral Access Control Register (AIPS1_PACRF) 32 R/W Undefined 19.2.3/373
4008_0048 Peripheral Access Control Register (AIPS1_PACRG) 32 R/W Undefined 19.2.3/373
4008_004C Peripheral Access Control Register (AIPS1_PACRH) 32 R/W Undefined 19.2.3/373
4008_0050 Peripheral Access Control Register (AIPS1_PACRI) 32 R/W Undefined 19.2.3/373
4008_0054 Peripheral Access Control Register (AIPS1_PACRJ) 32 R/W Undefined 19.2.3/373
4008_0058 Peripheral Access Control Register (AIPS1_PACRK) 32 R/W Undefined 19.2.3/373
4008_005C Peripheral Access Control Register (AIPS1_PACRL) 32 R/W Undefined 19.2.3/373
4008_0060 Peripheral Access Control Register (AIPS1_PACRM) 32 R/W Undefined 19.2.3/373
4008_0064 Peripheral Access Control Register (AIPS1_PACRN) 32 R/W Undefined 19.2.3/373
4008_0068 Peripheral Access Control Register (AIPS1_PACRO) 32 R/W Undefined 19.2.3/373
4008_006C Peripheral Access Control Register (AIPS1_PACRP) 32 R/W Undefined 19.2.3/373
Chapter 19 Peripheral Bridge (AIPS-Lite)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
365
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