Information

AIPSx_PACRn field descriptions (continued)
Field Description
0 Accesses from an untrusted master are allowed.
1 Accesses from an untrusted master are not allowed.
3
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
2
SP7
Supervisor Protect
Determines whether the peripheral requires supervisor privilege level for accesses. When this field is set,
the master privilege level must indicate the supervisor access attribute, and the MPR x [MPL n ] control
field for the master must be set. If not, access terminates with an error response and no peripheral access
initiates .
0 This peripheral does not require supervisor privilege level for accesses.
1 This peripheral requires supervisor privilege level for accesses.
1
WP7
Write Protect
Determines whether the peripheral allows write accessses. When this field is set and a write access is
attempted, access terminates with an error response and no peripheral access initiates .
0 This peripheral allows write accesses.
1 This peripheral is write protected.
0
TP7
Trusted Protect
Determines whether the peripheral allows accesses from an untrusted master. When this field is set and
an access is attempted by an untrusted master, the access terminates with an error response and no
peripheral access initiates .
0 Accesses from an untrusted master are allowed.
1 Accesses from an untrusted master are not allowed.
19.3 Functional description
The peripheral bridge serves as an interface between the crossbar switch and the slave
peripheral bus. It functions as a protocol translator.
The peripheral bridge generates select signals for modules on the peripheral bus by
decoding accesses within the peripheral bridge address space.
19.3.1 Access support
Aligned and misaligned 32-bit and 16-bit accesses, as well as byte accesses are supported
for 32-bit peripherals. Misaligned accesses are supported to allow memory to be placed
on the slave peripheral bus. Peripheral registers must not be misaligned, although no
explicit checking is performed by the peripheral bridge. All accesses are performed with
a single transfer.
Functional description
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
378
Preliminary
Freescale Semiconductor, Inc.
General Business Information