Information

21.3.17 TCD Source Address (DMA_TCDn_SADDR)
Address: 4000_8000h base + 1000h offset + (32d × i), where i=0d to 15d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
SADDR
W
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
DMA_TCDn_SADDR field descriptions
Field Description
31–0
SADDR
Source Address
Memory address pointing to the source data.
21.3.18 TCD Signed Source Address Offset (DMA_TCDn_SOFF)
Address: 4000_8000h base + 1004h offset + (32d × i), where i=0d to 15d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
SOFF
Write
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
DMA_TCDn_SOFF field descriptions
Field Description
15–0
SOFF
Source address signed offset
Sign-extended offset applied to the current source address to form the next-state value as each source
read is completed.
Chapter 21 Direct Memory Access Controller (eDMA)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
433
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