Information

21.3.19 TCD Transfer Attributes (DMA_TCDn_ATTR)
Address: 4000_8000h base + 1006h offset + (32d × i), where i=0d to 15d
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
SMOD SSIZE DMOD DSIZE
Write
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
DMA_TCDn_ATTR field descriptions
Field Description
15–11
SMOD
Source Address Modulo.
0 Source address modulo feature is disabled
≠0 This value defines a specific address range specified to be the value after SADDR + SOFF
calculation is performed or the original register value. The setting of this field provides the ability to
implement a circular data queue easily. For data queues requiring power-of-2 size bytes, the queue
should start at a 0-modulo-size address and the SMOD field should be set to the appropriate value
for the queue, freezing the desired number of upper address bits. The value programmed into this
field specifies the number of lower address bits allowed to change. For a circular queue application,
the SOFF is typically set to the transfer size to implement post-increment addressing with the SMOD
function constraining the addresses to a 0-modulo-size range.
10–8
SSIZE
Source data transfer size
The attempted use of a Reserved encoding causes a configuration error.
000 8-bit
001 16-bit
010 32-bit
011 Reserved
100 16-byte
101 Reserved
110 Reserved
111 Reserved
7–3
DMOD
Destination Address Modulo
See the SMOD definition
2–0
DSIZE
Destination Data Transfer Size
See the SSIZE definition
Memory map/register definition
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
434
Preliminary
Freescale Semiconductor, Inc.
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