Information

Table 2-3. System modules (continued)
Module Description
Direct memory access (DMA) controller The DMA controller provides programmable channels with transfer control
descriptors for data movement via dual-address transfers for 8-, 16-, 32- and 128-
bit data values.
External watchdog monitor (EWM) The EWM is a redundant mechanism to the software watchdog module that
monitors both internal and external system operation for fail conditions.
Software watchdog (WDOG) The WDOG monitors internal system operation and forces a reset in case of
failure. It can run from an independent 1 KHz low power oscillator with a
programmable refresh window to detect deviations in program flow or system
frequency.
2.2.3 Memories and Memory Interfaces
The following memories and memory interfaces are available on this device.
Table 2-4. Memories and memory interfaces
Module Description
Flash memory Program flash memory — non-volatile flash memory that can execute
program code
FlexMemory — encompasses the following memory types:
FlexNVM — Non-volatile flash memory that can execute program
code, store data, or backup EEPROM data
FlexRAM — RAM memory that can be used as traditional RAM or as
high-endurance EEPROM storage, and also accelerates flash
programming
Flash memory controller Manages the interface between the device and the on-chip flash memory.
SRAM Internal system RAM. Partial SRAM kept powered in VLLS2 low leakage mode.
SRAM controller Manages simultaneous accesses to system RAM by multiple master peripherals
and core.
System register file 32-byte register file that is accessible during all power modes and is powered by
VDD.
VBAT register file 32-byte register file that is accessible during all power modes and is powered by
VBAT.
Serial programming interface (EzPort) Same serial interface as, and subset of, the command set used by industry-
standard SPI flash memories. Provides the ability to read, erase, and program
flash memory and reset command to boot the system after flash programming.
FlexBus External bus interface with multiple independent, user-programmable chip-select
signals that can interface with external SRAM, PROM, EPROM, EEPROM, flash,
and other peripherals via 8-, 16- and 32-bit port sizes. Configurations include
multiplexed or non-multiplexed address and data buses using 8-bit, 16-bit, 32-bit,
and 16-byte line-sized transfers.
Module Functional Categories
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
56
Preliminary
Freescale Semiconductor, Inc.
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