Information

Section number Title Page
3.7 Analog...........................................................................................................................................................................101
3.7.1 16-bit SAR ADC with PGA Configuration.................................................................................................101
3.7.2 CMP Configuration......................................................................................................................................111
3.7.3 12-bit DAC Configuration...........................................................................................................................113
3.7.4 VREF Configuration....................................................................................................................................114
3.8 Timers...........................................................................................................................................................................115
3.8.1 PDB Configuration......................................................................................................................................115
3.8.2 FlexTimer Configuration.............................................................................................................................118
3.8.3 PIT Configuration........................................................................................................................................122
3.8.4 Low-power timer configuration...................................................................................................................123
3.8.5 CMT Configuration......................................................................................................................................125
3.8.6 RTC configuration.......................................................................................................................................126
3.9 Communication interfaces............................................................................................................................................127
3.9.1 Universal Serial Bus (USB) FS Subsystem.................................................................................................127
3.9.2 CAN Configuration......................................................................................................................................132
3.9.3 SPI configuration.........................................................................................................................................134
3.9.4 I2C Configuration........................................................................................................................................138
3.9.5 UART Configuration...................................................................................................................................138
3.9.6 I2S configuration..........................................................................................................................................141
3.10 Human-machine interfaces...........................................................................................................................................144
3.10.1 GPIO configuration......................................................................................................................................144
3.10.2 TSI Configuration........................................................................................................................................145
Chapter 4
Memory Map
4.1 Introduction...................................................................................................................................................................149
4.2 System memory map.....................................................................................................................................................149
4.2.1 Aliased bit-band regions..............................................................................................................................150
4.3 Flash Memory Map.......................................................................................................................................................151
4.3.1 Alternate Non-Volatile IRC User Trim Description....................................................................................152
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
6
Preliminary
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