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The MCU must not read from the flash memory while commands are running (as
evidenced by CCIF=0) on that block. Read data cannot be guaranteed from a flash block
while any command is processing within that block. The block arbitration logic detects
any simultaneous access and reports this as a read collision error (see the
FSTAT[RDCOLERR] bit).
28.4.7 Read While Write (RWW)
The following simultaneous accesses are allowed:
• The user may read from the program flash memory while commands (typically
program and erase operations) are active in the data flash and FlexRAM memory
space.
• The MCU can fetch instructions from program flash during both data flash program
and erase operations and while EEPROM backup data is maintained by the
EEPROM commands.
• Conversely, the user may read from data flash and FlexRAM while program and
erase commands are executing on the program flash.
• When configured as traditional RAM, writes to the FlexRAM are allowed during
program and data flash operations.
Simultaneous data flash operations and FlexRAM writes, when FlexRAM is used for
EEPROM, are not possible.
Simultaneous operations are further discussed in Allowed Simultaneous Flash
Operations.
28.4.8 Flash Program and Erase
All flash functions except read require the user to setup and launch a flash command
through a series of peripheral bus writes. The user cannot initiate any further flash
commands until notified that the current command has completed. The flash command
structure and operation are detailed in Flash Command Operations.
28.4.9 Flash Command Operations
Flash command operations are typically used to modify flash memory contents. The next
sections describe:
Chapter 28 Flash Memory Module (FTFL)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
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