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Table 29-1. FlexBus signal descriptions (continued)
Signal I/O Function
FB_TA I Transfer Acknowledge—Indicates that the external data transfer is complete. When
FB_TA is asserted during a read transfer, FlexBus latches the data and then terminates
the transfer. When FB_TA is asserted during a write transfer, the transfer is terminated.
If auto-acknowledge is disabled (CSCR[AA] = 0), the external memory or peripheral
drives FB_TA to terminate the transfer. If auto-acknowledge is enabled (CSCR[AA] =
1), FB_TA is generated internally after a specified number of wait states, or the external
memory or peripheral may assert external FB_TA before the wait-state countdown to
terminate the transfer early. The chip deasserts FB_CS one cycle after the last FB_TA
is asserted. During read transfers, the external memory or peripheral must continue to
drive data until FB_TA is recognized. For write transfers, the chip continues driving
data one clock cycle after FB_CS is deasserted.
The number of wait states is determined by CSCR or the external FB_TA input. If the
external FB_TA is used, the external memory or peripheral has complete control of the
number of wait states.
Note: External memory or peripherals should assert FB_TA only while the FB_CS
signal to the external memory or peripheral is asserted.
The CSPMCR register controls muxing of FB_TA with other signals. If auto-
acknowledge is not used and CSPMCR does not allow FB_TA control, FlexBus
may hang.
FB_CLK O FlexBus Clock Output
29.3 Memory Map/Register Definition
The following tables describe the registers and bit meanings for configuring chip-select
operation.
The actual number of chip selects available depends upon the device and its pin
configuration. If the device does not support certain chip select signals or the pin is not
configured for a chip-select function, then that corresponding set of chip-select registers
has no effect on an external pin.
Note
You must set CSMR0[V] before the chip select registers take
effect.
A bus error occurs when writing to reserved register locations.
Chapter 29 External Bus Interface (FlexBus)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
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