Information

Address
Address Data
TSIZ
AA=1
AA=0
AA=1
AA=0
DataData Data
Add+1 Add+2 Add+3
FB_CLK
FB_A[Y]
FB_D[X]
FB_RW
FB_TS
FB_ALE
FB_CSn
FB_OEn
FB_BE/BWEn
FB_TA
FB_TSIZ[1:0]
29.4.12.5 32-bit-write burst-inhibited to 8-bit port (no wait states)
The following figure shows a 32-bit write to an 8-bit device with burst inhibited. The
transfer results in four individual transfers. The transfer size is driven at 32-bit (00b)
during the first transfer and at byte (01b) during the next three transfers.
Chapter 29 External Bus Interface (FlexBus)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
681
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