Information

ADCx_SC2 field descriptions (continued)
Field Description
10 Reserved
11 Reserved
32.3.7 Status and Control Register 3 (ADCx_SC3)
The Status and Control Register 3 (SC3) controls the calibration, continuous convert, and
hardware averaging functions of the ADC module.
Address: Base address + 24h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CAL
CALF
0
ADCO
AVGE
AVGS
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ADCx_SC3 field descriptions
Field Description
31–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
7
CAL
Calibration
Begins the calibration sequence when set. This field stays set while the calibration is in progress and is
cleared when the calibration sequence is completed. CALF must be checked to determine the result of the
Table continues on the next page...
Chapter 32 Analog-to-Digital Converter (ADC)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
727
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