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initiated. When it is idle and the asynchronous clock output enable is disabled, or
CFG2[ADACKEN]= 0, the module is in its lowest power state. The ADC can perform an
analog-to-digital conversion on any of the software selectable channels. All modes
perform conversion by a successive approximation algorithm.
To meet accuracy specifications, the ADC module must be calibrated using the on-chip
calibration function. See Calibration function for details on how to perform calibration.
When the conversion is completed, the result is placed in the Rn data registers. The
respective SC1n[COCO] is then set and an interrupt is generated if the respective
conversion complete interrupt has been enabled, or, when SC1n[AIEN]=1.
The ADC module has the capability of automatically comparing the result of a
conversion with the contents of the CV1 and CV2 registers. The compare function is
enabled by setting SC2[ACFE] and operates in any of the conversion modes and
configurations.
The ADC module has the capability of automatically averaging the result of multiple
conversions. The hardware average function is enabled by setting SC3[AVGE] and
operates in any of the conversion modes and configurations.
NOTE
For the chip specific modes of operation, see the power
management information of this MCU.
32.4.1 PGA functional description
The Programmable Gain Amplifier (PGA) is designed to increase the dynamic range by
amplifying low-amplitude signals before they are fed to the 16-bit Successive
Approximation Register (SAR) ADC. The gain of this amplifier ranges between 1 to 64
in (2^N) steps, that is, 1, 2, 4, 8, 16, 32, and 64.
This block is designed to work with differential input and output with input signals that
range from 0 to 1.2 V ± 10 mV. The output common mode of the PGA is determined
based on the SAR ADC requirement.
The PGA has only one voltage reference pair. The positive reference used is chip-specific
and depends on the MCU configuration. The ground reference is the analog ground for
the PGA. See the chip configuration chapter on the PGA voltage reference specific to this
MCU.
The PGA register allows to control the PGA gain and modes of operation.
Chapter 32 Analog-to-Digital Converter (ADC)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
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