Information

Table 3-18. DMA request sources - MUX 0 (continued)
Source
number
Source module Source description
9 UART3 Transmit
10 UART4 Receive
11 UART4 Transmit
12 Reserved —
13 Reserved —
14 I
2
S0 Receive
15 I
2
S0 Transmit
16 SPI0 Receive
17 SPI0 Transmit
18 SPI1 Receive
19 SPI1 Transmit
20 Reserved —
21 Reserved —
22 I
2
C0 —
23 I
2
C1 —
24 FTM0 Channel 0
25 FTM0 Channel 1
26 FTM0 Channel 2
27 FTM0 Channel 3
28 FTM0 Channel 4
29 FTM0 Channel 5
30 FTM0 Channel 6
31 FTM0 Channel 7
32 FTM1 Channel 0
33 FTM1 Channel 1
34 FTM2 Channel 0
35 FTM2 Channel 1
36 Reserved —
37 Reserved —
38 Reserved —
39 Reserved —
40 ADC0 —
41 ADC1 —
42 CMP0 —
43 CMP1 —
44 CMP2 —
45 DAC0 —
46 Reserved —
47 CMT —
Table continues on the next page...
System modules
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
80
Preliminary
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