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Table 34-47. Modes of DAC data buffer operation (continued)
Modes Description
Buffer One-time Scan mode
The read pointer increases by 1 every time the trigger occurs.
When it reaches the upper limit, it stops there. If read pointer
is reset to the address other than the upper limit, it will
increase to the upper address and stop there again.
NOTE: If the software set the read pointer to the upper limit,
the read pointer will not advance in this mode.
34.5.2 DMA operation
When DMA is enabled, DMA requests are generated instead of interrupt requests. The
DMA Done signal clears the DMA request.
The status register flags are still set and are cleared automatically when the DMA
completes.
34.5.3 Resets
During reset, the DAC is configured in the default mode and is disabled.
34.5.4 Low-Power mode operation
The following table shows the wait mode and the stop mode operation of the DAC
module.
Table 34-48. Modes of operation
Modes of operation Description
Wait mode The DAC will operate normally, if enabled.
Stop mode
If enabled, the DAC module continues to operate
in Normal Stop mode and the output voltage will
hold the value before stop.
In low-power stop modes, the DAC is fully
shut down.
NOTE
The assignment of module modes to core modes is chip-
specific. For module-to-core mode assignments, see the chapter
that describes how modules are configured.
Chapter 34 12-bit Digital-to-Analog Converter (DAC)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
801
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