Information

NOTE
The software trigger, SWSYNC bit, and hardware triggers
TRIG0, TRIG1, and TRIG2 bits have a potential conflict if
used together when SYNCMODE = 0. Use only hardware or
software triggers but not both at the same time, otherwise
unpredictable behavior is likely to happen.
The selection of the loading point, CNTMAX and CNTMIN
bits, is intended to provide the update of MOD, CNTIN, and
CnV registers across all enabled channels simultaneously. The
use of the loading point selection together with SYNCMODE =
0 and hardware trigger selection, TRIG0, TRIG1, or TRIG2
bits, is likely to result in unpredictable behavior.
The synchronization event selection also depends on the
PWMSYNC (MODE register) and SYNCMODE (SYNCONF
register) bits. See PWM synchronization.
Address: Base address + 58h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
SWSYNC
TRIG2 TRIG1 TRIG0
SYNCHOM
REINIT
CNTMAX
CNTMIN
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_SYNC field descriptions
Field Description
31–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
7
SWSYNC
PWM Synchronization Software Trigger
Selects the software trigger as the PWM synchronization trigger. The software trigger happens when a 1 is
written to SWSYNC bit.
0 Software trigger is not selected.
1 Software trigger is selected.
6
TRIG2
PWM Synchronization Hardware Trigger 2
Table continues on the next page...
Chapter 37 FlexTimer Module (FTM)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
855
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