Information

37.3.16 FTM External Trigger (FTMx_EXTTRIG)
This register:
• Indicates when a channel trigger was generated
• Enables the generation of a trigger when the FTM counter is equal to its initial
• Selects which channels are used in the generation of the channel triggers
Several channels can be selected to generate multiple triggers in one PWM period.
Channels 6 and 7 are not used to generate channel triggers.
Address: Base address + 6Ch offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
Reserved
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Reserved
TRIGF
INITTRIGEN
CH1TRIG CH0TRIG CH5TRIG CH4TRIG CH3TRIG CH2TRIG
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_EXTTRIG field descriptions
Field Description
31–8
Reserved
This field is reserved.
7
TRIGF
Channel Trigger Flag
Set by hardware when a channel trigger is generated. Clear TRIGF by reading EXTTRIG while TRIGF is
set and then writing a 0 to TRIGF. Writing a 1 to TRIGF has no effect.
If another channel trigger is generated before the clearing sequence is completed, the sequence is reset
so TRIGF remains set after the clear sequence is completed for the earlier TRIGF.
0 No channel trigger was generated.
1 A channel trigger was generated.
6
INITTRIGEN
Initialization Trigger Enable
Enables the generation of the trigger when the FTM counter is equal to the CNTIN register.
0 The generation of initialization trigger is disabled.
1 The generation of initialization trigger is enabled.
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Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
866
Preliminary
Freescale Semiconductor, Inc.
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