Information

FTMx_EXTTRIG field descriptions (continued)
Field Description
5
CH1TRIG
Channel 1 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
4
CH0TRIG
Channel 0 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
3
CH5TRIG
Channel 5 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
2
CH4TRIG
Channel 4 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
1
CH3TRIG
Channel 3 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
0
CH2TRIG
Channel 2 Trigger Enable
Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.
0 The generation of the channel trigger is disabled.
1 The generation of the channel trigger is enabled.
37.3.17 Channels Polarity (FTMx_POL)
This register defines the output polarity of the FTM channels.
NOTE
The safe value that is driven in a channel output when the fault
control is enabled and a fault condition is detected is the
inactive state of the channel. That is, the safe value of a channel
is the value of its POL bit.
Chapter 37 FlexTimer Module (FTM)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
867
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