Information

FTMx_FLTCTRL field descriptions (continued)
Field Description
0 Fault input is disabled.
1 Fault input is enabled.
0
FAULT0EN
Fault Input 0 Enable
Enables the fault input.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 Fault input is disabled.
1 Fault input is enabled.
37.3.21 Quadrature Decoder Control And Status (FTMx_QDCTRL)
This register has the control and status bits for the Quadrature Decoder mode.
Address: Base address + 80h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
PHAFLTREN PHBFLTREN
PHAPOL PHBPOL
QUADMODE
QUADIR
TOFDIR
QUADEN
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 37 FlexTimer Module (FTM)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
875
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