Information

FTMx_INVCTRL field descriptions (continued)
Field Description
0
INV0EN
Pair Channels 0 Inverting Enable
0 Inverting is disabled.
1 Inverting is enabled.
37.3.26 FTM Software Output Control (FTMx_SWOCTRL)
This register enables software control of channel (n) output and defines the value forced
to the channel (n) output:
The CHnOC bits enable the control of the corresponding channel (n) output by
software.
The CHnOCV bits select the value that is forced at the corresponding channel (n)
output.
This register has a write buffer. The fields are updated by the SWOCTRL register
synchronization.
Address: Base address + 94h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
CH7OCV
CH6OCV
CH5OCV
CH4OCV
CH3OCV
CH2OCV
CH1OCV
CH0OCV
CH7OC
CH6OC
CH5OC
CH4OC
CH3OC
CH2OC
CH1OC
CH0OC
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_SWOCTRL field descriptions
Field Description
31–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
15
CH7OCV
Channel 7 Software Output Control Value
0 The software output control forces 0 to the channel output.
1 The software output control forces 1 to the channel output.
14
CH6OCV
Channel 6 Software Output Control Value
Table continues on the next page...
Chapter 37 FlexTimer Module (FTM)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
883
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