Information

FTMx_SWOCTRL field descriptions (continued)
Field Description
0 The channel output is not affected by software output control.
1 The channel output is affected by software output control.
1
CH1OC
Channel 1 Software Output Control Enable
0 The channel output is not affected by software output control.
1 The channel output is affected by software output control.
0
CH0OC
Channel 0 Software Output Control Enable
0 The channel output is not affected by software output control.
1 The channel output is affected by software output control.
37.3.27 FTM PWM Load (FTMx_PWMLOAD)
Enables the loading of the MOD, CNTIN, C(n)V, and C(n+1)V registers with the values
of their write buffers when the FTM counter changes from the MOD register value to its
next value or when a channel (j) match occurs. A match occurs for the channel (j) when
FTM counter = C(j)V.
Address: Base address + 98h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
LDOK
0
CH7SEL CH6SEL CH5SEL CH4SEL CH3SEL CH2SEL CH1SEL CH0SEL
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_PWMLOAD field descriptions
Field Description
31–10
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
9
LDOK
Load Enable
Enables the loading of the MOD, CNTIN, and CV registers with the values of their write buffers.
0 Loading updated values is disabled.
1 Loading updated values is enabled.
Table continues on the next page...
Chapter 37 FlexTimer Module (FTM)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
885
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