Information

3.5.5.1 System Register file
This device includes a 32-byte register file that is powered in all power modes.
Also, it retains contents during low-voltage detect (LVD) events and is only reset during
a power-on reset.
3.5.6 VBAT Register File Configuration
This section summarizes how the module has been configured in the chip.
VBAT register file
Peripheral
bridge
Register
access
Figure 3-26. VBAT Register file configuration
Table 3-34. Reference links to related information
Topic Related module Reference
Full description VBAT register file VBAT register file
System memory map System memory map
Clocking Clock distribution
Power management Power management
3.5.6.1 VBAT register file
This device includes a 32-byte register file that is powered in all power modes and is
powered by VBAT.
It is only reset during VBAT power-on reset.
Memories and memory interfaces
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
96
Preliminary
Freescale Semiconductor, Inc.
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