Information

38.3 Memory map/register description
This section provides a detailed description of all registers accessible in the PIT module.
NOTE
Reserved registers will read as 0, writes will have no effect.
See the chip configuration details for the number of PIT channels used in this MCU.
PIT memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4003_7000 PIT Module Control Register (PIT_MCR) 32 R/W 0000_0002h 38.3.1/967
4003_7100 Timer Load Value Register (PIT_LDVAL0) 32 R/W 0000_0000h 38.3.2/968
4003_7104 Current Timer Value Register (PIT_CVAL0) 32 R/W 0000_0000h 38.3.3/969
4003_7108 Timer Control Register (PIT_TCTRL0) 32 R/W 0000_0000h 38.3.4/969
4003_710C Timer Flag Register (PIT_TFLG0) 32 R/W 0000_0000h 38.3.5/970
4003_7110 Timer Load Value Register (PIT_LDVAL1) 32 R/W 0000_0000h 38.3.2/968
4003_7114 Current Timer Value Register (PIT_CVAL1) 32 R/W 0000_0000h 38.3.3/969
4003_7118 Timer Control Register (PIT_TCTRL1) 32 R/W 0000_0000h 38.3.4/969
4003_711C Timer Flag Register (PIT_TFLG1) 32 R/W 0000_0000h 38.3.5/970
4003_7120 Timer Load Value Register (PIT_LDVAL2) 32 R/W 0000_0000h 38.3.2/968
4003_7124 Current Timer Value Register (PIT_CVAL2) 32 R/W 0000_0000h 38.3.3/969
4003_7128 Timer Control Register (PIT_TCTRL2) 32 R/W 0000_0000h 38.3.4/969
4003_712C Timer Flag Register (PIT_TFLG2) 32 R/W 0000_0000h 38.3.5/970
4003_7130 Timer Load Value Register (PIT_LDVAL3) 32 R/W 0000_0000h 38.3.2/968
4003_7134 Current Timer Value Register (PIT_CVAL3) 32 R/W 0000_0000h 38.3.3/969
4003_7138 Timer Control Register (PIT_TCTRL3) 32 R/W 0000_0000h 38.3.4/969
4003_713C Timer Flag Register (PIT_TFLG3) 32 R/W 0000_0000h 38.3.5/970
38.3.1 PIT Module Control Register (PIT_MCR)
This register enables or disables the PIT timer clocks and controls the timers when the
PIT enters the Debug mode.
Address: 4003_7000h base + 0h offset = 4003_7000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 38 Periodic Interrupt Timer (PIT)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
967
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