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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 100 (14x14) 32-Bit 72 MHz I/O number 66
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39.4.5 LPTMR counter
The CNR increments by one on every:
• Prescaler clock in Time Counter mode with prescaler bypassed
• Prescaler output in Time Counter mode with prescaler enabled
• Input source assertion in Pulse Counter mode with glitch filter bypassed
• Glitch filter output in Pulse Counter mode with glitch filter enabled
The CNR is reset when the LPTMR is disabled or if the counter register overflows. If
CSR[TFC] is set, then the CNR is also reset whenever CSR[TCF] is set.
The CNR continues incrementing when the core is halted in Debug mode.
The CNR cannot be initialized, but can be read at any time. Reading the CNR at the time
it is incrementing may return invalid data due to synchronization of the read data bus. If it
is necessary for software to read the CNR, it is recommended that two read accesses are
performed and software verifies that the same data was returned for both reads.
39.4.6 LPTMR hardware trigger
The LPTMR hardware trigger asserts at the same time the CSR[TCF] is set and can be
used to trigger hardware events in other peripherals without software intervention. The
hardware trigger is always enabled.
When Then
The CMR is set to 0 with CSR[TFC] clear The LPTMR hardware trigger will assert on the first compare
and does not deassert.
The CMR is set to a nonzero value, or, if CSR[TFC] is set The LPTMR hardware trigger will assert on each compare
and deassert on the following increment of the CNR.
39.4.7 LPTMR interrupt
The LPTMR interrupt is generated whenever CSR[TIE] and CSR[TCF] are set.
CSR[TCF] is cleared by disabling the LPTMR or by writing a logic 1 to it.
CSR[TIE] can be altered and CSR[TCF] can be cleared while the LPTMR is enabled.
The LPTMR interrupt is generated asynchronously to the system clock and can be used to
generate a wakeup from any low-power mode, including the low-leakage modes,
provided the LPTMR is enabled as a wakeup source.
Functional description
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
984
Preliminary
Freescale Semiconductor, Inc.
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