Information

CMT_CGH2 field descriptions (continued)
Field Description
The secondary carrier high time value is undefined out of reset. This register must be written
to nonzero values before the carrier generator is enabled when operating in FSK mode.
40.6.4 CMT Carrier Generator Low Data Register 2 (CMT_CGL2)
This data register contains the secondary low value for generating the carrier output.
Address: 4006_2000h base + 3h offset = 4006_2003h
Bit 7 6 5 4 3 2 1 0
Read
SL
Write
Reset
x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.
CMT_CGL2 field descriptions
Field Description
7–0
SL
Secondary Carrier Low Time Data Value
Contains the number of input clocks required to generate the carrier low time period. When
operating in Time mode, this register is never selected. When operating in FSK mode, this
register and the primary register pair are alternately selected under the control of the
modulator. The secondary carrier low time value is undefined out of reset. This register must
be written to nonzero values before the carrier generator is enabled when operating in FSK
mode.
40.6.5 CMT Output Control Register (CMT_OC)
This register is used to control the IRO signal of the CMT module.
Address: 4006_2000h base + 4h offset = 4006_2004h
Bit 7 6 5 4 3 2 1 0
Read
IROL CMTPOL IROPEN
0
Write
Reset
0 0 0 0 0 0 0 0
Chapter 40 Carrier Modulator Transmitter (CMT)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
993
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