Information
CMT_MSC field descriptions (continued)
Field Description
• The modulator is not currently active and MCGEN is set to begin the initial CMT
transmission.
• At the end of each modulation cycle while MCGEN is set. This is recognized
when a match occurs between the contents of the space period register and the
down counter. At this time, the counter is initialized with, possibly new contents
of the mark period buffer, CMD1 and CMD2, and the space period register is
loaded with, possibly new contents of the space period buffer, CMD3 and
CMD4.
This flag is cleared by reading MSC followed by an access of CMD2 or CMD4, or by
the DMA transfer.
0 End of modulation cycle has not occured since the flag last cleared.
1
End of modulator cycle has occurred.
6–5
CMTDIV
CMT Clock Divide Prescaler
Causes the CMT to be clocked at the IF signal frequency, or the IF frequency divided
by 2 ,4, or 8 . This field must not be changed during a transmission because it is not
double-buffered.
00 IF ÷ 1
01 IF ÷ 2
10 IF ÷ 4
11 IF ÷ 8
4
EXSPC
Extended Space Enable
Enables the extended space operation.
0 Extended space is disabled.
1
Extended space is enabled.
3
BASE
Baseband Enable
When set, BASE disables the carrier generator and forces the carrier output high for
generation of baseband protocols. When BASE is cleared, the carrier generator is
enabled and the carrier output toggles at the frequency determined by values stored
in the carrier data registers. This field is cleared by reset. This field is not double-
buffered and must not be written to during a transmission.
0 Baseband mode is disabled.
1
Baseband mode is enabled.
2
FSK
FSK Mode Select
Enables FSK operation.
0 The CMT operates in Time or Baseband mode.
1
The CMT operates in FSK mode.
1
EOCIE
End of Cycle Interrupt Enable
Requests to enable a CPU interrupt when EOCF is set if EOCIE is high.
Table continues on the next page...
Chapter 40 Carrier Modulator Transmitter (CMT)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
995
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