Information

CMT_PPS field descriptions (continued)
Field Description
The primary prescaler divides the CMT clock to generate the Intermediate Frequency clock enable to the
secondary prescaler.
0000 Bus Clock ÷ 1
0001
Bus Clock ÷ 2
0010
Bus Clock ÷ 3
0011
Bus Clock ÷ 4
0100
Bus Clock ÷ 5
0101
Bus Clock ÷ 6
0110
Bus Clock ÷ 7
0111
Bus Clock ÷ 8
1000
Bus Clock ÷ 9
1001
Bus Clock ÷ 10
1010
Bus Clock ÷ 11
1011
Bus Clock ÷ 12
1100
Bus Clock ÷ 13
1101
Bus Clock ÷ 14
1110
Bus Clock ÷ 15
1111
Bus Clock ÷ 16
40.6.12 CMT Direct Memory Access (CMT_DMA)
This register is used to enable/disable direct memory access (DMA).
Address: CMT_DMA is 4006_2000h base + Bh offset = 4006_200Bh
Bit 7 6 5 4 3 2 1 0
Read 0
DMA
Write
Reset
0 0 0 0 0 0 0 0
CMT_DMA field descriptions
Field Description
7–1
Reserved
This read-only field is reserved and always has the value zero.
0
DMA
DMA Enable
This bit enables the DMA protocol.
Table continues on the next page...
Memory Map/Register Definition
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
1018 Freescale Semiconductor, Inc.