Information

USB memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4007_201C OTG Control Register (USB0_OTGCTL) 8 R/W 00h
42.4.8/
1064
4007_2080 Interrupt Status Register (USB0_ISTAT) 8 R/W 00h
42.4.9/
1065
4007_2084 Interrupt Enable Register (USB0_INTEN) 8 R/W 00h
42.4.10/
1066
4007_2088 Error Interrupt Status Register (USB0_ERRSTAT) 8 R/W 00h
42.4.11/
1067
4007_208C Error Interrupt Enable Register (USB0_ERREN) 8 R/W 00h
42.4.12/
1068
4007_2090 Status Register (USB0_STAT) 8 R 00h
42.4.13/
1070
4007_2094 Control Register (USB0_CTL) 8 R/W 00h
42.4.14/
1071
4007_2098 Address Register (USB0_ADDR) 8 R/W 00h
42.4.15/
1072
4007_209C BDT Page Register 1 (USB0_BDTPAGE1) 8 R/W 00h
42.4.16/
1073
4007_20A0 Frame Number Register Low (USB0_FRMNUML) 8 R/W 00h
42.4.17/
1073
4007_20A4 Frame Number Register High (USB0_FRMNUMH) 8 R/W 00h
42.4.18/
1074
4007_20A8 Token Register (USB0_TOKEN) 8 R/W 00h
42.4.19/
1074
4007_20AC SOF Threshold Register (USB0_SOFTHLD) 8 R/W 00h
42.4.20/
1075
4007_20B0 BDT Page Register 2 (USB0_BDTPAGE2) 8 R/W 00h
42.4.21/
1076
4007_20B4 BDT Page Register 3 (USB0_BDTPAGE3) 8 R/W 00h
42.4.22/
1076
4007_20C0 Endpoint Control Register (USB0_ENDPT0) 8 R/W 00h
42.4.23/
1076
4007_20C4 Endpoint Control Register (USB0_ENDPT1) 8 R/W 00h
42.4.23/
1076
4007_20C8 Endpoint Control Register (USB0_ENDPT2) 8 R/W 00h
42.4.23/
1076
4007_20CC Endpoint Control Register (USB0_ENDPT3) 8 R/W 00h
42.4.23/
1076
4007_20D0 Endpoint Control Register (USB0_ENDPT4) 8 R/W 00h
42.4.23/
1076
Table continues on the next page...
Memory Map/Register Definitions
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
1058 Freescale Semiconductor, Inc.