Information

42.4.4 Peripheral Additional Info Register (USBx_ADDINFO)
The Peripheral Additional info Register reads back the value of the fixed Interrupt
Request Level (IRQNUM) along with the Host Enable bit. If set to 1, the Host Enable bit
indicates the USB peripheral is operating in host mode.
Addresses: USB0_ADDINFO is 4007_2000h base + Ch offset = 4007_200Ch
Bit 7 6 5 4 3 2 1 0
Read IRQNUM 0 IEHOST
Write
Reset
0 0 0 0 0 0 0 1
USBx_ADDINFO field descriptions
Field Description
7–3
IRQNUM
Assigned Interrupt Request Number
2–1
Reserved
This read-only field is reserved and always has the value zero.
0
IEHOST
This bit is set if host mode is enabled.
42.4.5 OTG Interrupt Status Register (USBx_OTGISTAT)
The OTG Interrupt Status Register records changes of the ID sense and VBUS signals.
Software can read this register to determine which event has caused an interrupt. Only
bits that have changed since the last software read are set. Writing a one to a bit clears the
associated interrupt.
Addresses: USB0_OTGISTAT is 4007_2000h base + 10h offset = 4007_2010h
Bit 7 6 5 4 3 2 1 0
Read
IDCHG ONEMSEC
LINE_
STATE_
CHG
0
SESSVLDCHG B_SESS_CHG
0
AVBUSCHG
Write
Reset
0 0 0 0 0 0 0 0
USBx_OTGISTAT field descriptions
Field Description
7
IDCHG
This bit is set when a change in the ID Signal from the USB connector is sensed.
6
ONEMSEC
This bit is set when the 1 millisecond timer expires. This bit stays asserted until cleared by software. The
interrupt must be serviced every millisecond to avoid losing 1msec counts.
Table continues on the next page...
Chapter 42 Universal Serial Bus OTG Controller (USBOTG)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1061