Information

42.4.27 USB Transceiver Control Register 0 (USBx_USBTRC0)
Addresses: USB0_USBTRC0 is 4007_2000h base + 10Ch offset = 4007_210Ch
Bit 7 6 5 4 3 2 1 0
Read
USBRESMEN
0
SYNC_DET
USB_
RESUME_
INT
Write USBRESET 1
Reset
0 0 0 0 0 0 0 0
USBx_USBTRC0 field descriptions
Field Description
7
USBRESET
USB reset
Generates a hard reset to the USB_OTG module. After this bit is set and the reset occurs, this bit is
automatically cleared.
NOTE: It is always read as zero.
0 Normal USB module operation.
1 Returns the USB module to its reset state.
6
Reserved
This field is reserved.
NOTE: Software must set this bit to 1b.
5
USBRESMEN
Asynchronous Resume Interrupt Enable
This bit, when set, allows the USB module to send an asynchronous wakeup event to the MCU upon
detection of resume signaling on the USB bus. The MCU then re-enables clocks to the USB module. It is
used for low-power suspend mode when USB module clocks are stopped or the USB transceiver is in
Suspend mode. Async wakeup only works in device mode.
0 USB asynchronous wakeup from suspend mode disabled.
1 USB asynchronous wakeup from suspend mode enabled. The asynchronous resume interrupt differs
from the synchronous resume interrupt in that it asynchronously detects K-state using the unfiltered
state of the D+ and D- pins. This interupt should only be enabled when the Transceiver is suspended.
4–2
Reserved
This read-only field is reserved and always has the value zero.
1
SYNC_DET
Synchronous USB Interrupt Detect
0 Synchronous interrupt has not been detected.
1 Synchronous interrupt has been detected.
0
USB_RESUME_
INT
USB Asynchronous Interrupt
0 No interrupt was generated.
1 Interrupt was generated because of the USB asynchronous interrupt.
Memory Map/Register Definitions
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
1080 Freescale Semiconductor, Inc.