Information

• Updates the STATUS register to reflect the error with SEQ_RES = 00. (See Table

43-18 for field values.)

• Sets the CONTROL[IF] bit.

• Generates an interrupt if enabled (the CONTROL[IE] bit is set).

Note that in this case the module does not wait for the T

VDPSRC_CON

interval to elapse.

At this point, control has been passed to system software via the interrupt. The rest of the

sequence (detecting the type of charging port) is not applicable, so software should:

1. Read the STATUS register.

2. Set the CONTROL[IACK] bit to acknowledge the interrupt.

3. Set the CONTROL[SR] bit to issue a software reset to the module.

4. Disable the module.

43.5.1.5 Charger Type Detection

After software enables the D+ pullup resistor, the module is notified automatically (via

internal signaling; the module waits until the ipp_pue_pullup_dp input goes high) to start

the CHECK_DM timer counting down the time interval programmed into the

TIMER2[CHECK_DM] field.

Once the CHECK_DM time has elapsed, the module samples the USB D- line to

determine the type of charger. See the following table.

Table 43-17. Sampling D- in the Charger Type Detection Phase

If the voltage on D- is... Then... See...

High The port is a dedicated charging port.

Dedicated

Charging Port

Low The port is a charging host port.

Charging Host

Port

1. In a dedicated charger, the D+ and D- lines are shorted together through a small resistor.

2. In a charging host port, the D+ and D- lines are not shorted.

43.5.1.5.1 Dedicated Charging Port

For a dedicated charger, the module does the following:

Functional Description

K20 Sub-Family Reference Manual, Rev. 6, Nov 2011

1108 Freescale Semiconductor, Inc.