Information

• Updates the STATUS register to reflect that a dedicated charger has been detected
with SEQ_RES = 11. (See Table 43-18 for field values.)
• Sets the CONTROL[IF] bit.
• Generates an interrupt if enabled (the CONTROL[IE] bit is set).
At this point, control has been passed to system software via the interrupt. Software
should:
1. Read the STATUS register.
2. Disable the USB controller to prevent transitions on the USB D+ or D- lines from
causing spurious interrupt or wake-up events to the system.
3. Set the CONTROL[IACK] bit to acknowledge the interrupt.
4. Set the CONTROL[SR] bit to issue a software reset to the module.
5. Disable the module.
6. Communicate the appropriate charge rate to the external battery charger IC; see
Table 43-13.
43.5.1.5.2 Charging Host Port
For a charging host port, the module does the following:
• Updates the STATUS register to reflect that a charging host port has been detected
with SEQ_RES = 10. (See Table 43-18 for field values.)
• Sets the CONTROL[IF] bit.
• Generates an interrupt if enabled (the CONTROL[IE] bit is set).
At this point, control has been passed to system software via the interrupt. Software
should:
1. Read the STATUS register.
2. Set the CONTROL[IACK] bit to acknowledge the interrupt.
3. Set the CONTROL[SR] bit to issue a software reset to the module.
4. Disable the module.
5. Communicate the appropriate charge rate to the external battery charger IC; see
Table 43-13.
Chapter 43 USB Device Charger Detection Module (USBDCD)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1109