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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 80 (12x12) 32-Bit 100 MHz I/O number 52

1151

45.3.14 Control 2 Register (CANx_CTRL2)

This register contains control bits for CAN errors, FIFO features, and mode selection.

Addresses: CAN0_CTRL2 is 4002_4000h base + 34h offset = 4002_4034h

CAN1_CTRL2 is 400A_4000h base + 34h offset = 400A_4034h

Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

WRMFRZ

RFFN TASD

MRP

RRS

EACEN

Reset

0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0

Bit

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reset

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

CANx_CTRL2 field descriptions

Field Description

Reserved

This field is reserved.

30–29

Reserved

This read-only field is reserved and always has the value zero.

WRMFRZ

Write-Access to Memory in Freeze mode

Enable unrestricted write access to FlexCAN memory in Freeze mode. This bit can only be written in

Freeze mode and has no effect out of Freeze mode.

0 Maintain the write access restrictions.

1 Enable unrestricted write access to FlexCAN memory.

27–24

RFFN

Number of Rx FIFO Filters

This 4-bit field defines the number of Rx FIFO filters, as shown in the following table. The maximum

selectable number of filters is determined by the MCU. This field can only be written in Freeze mode as it

is blocked by hardware in other modes. This field must not be programmed with values that make the

number of Message Buffers occupied by Rx FIFO and ID Filter exceed the number of Mailboxes present,

defined by MCR[MAXMB].

NOTE: Each group of eight filters occupies a memory space equivalent to two Message Buffers which

means that the more filters are implemented the less Mailboxes will be available.

Considering that the Rx FIFO occupies the memory space originally reserved for MB0-5, RFFN

should be programmed with a value correponding to a number of filters not greater than the

number of available memory words which can be calculated as follows:

(SETUP_MB - 6) x 4

where SETUP_MB is the least between NUMBER_OF_MB and MAXMB.

Table continues on the next page...

Memory Map/Register Definition

K20 Sub-Family Reference Manual, Rev. 6, Nov 2011

1152 Freescale Semiconductor, Inc.