Information

UART memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_C013 UART FIFO Transmit Watermark (UART2_TWFIFO) 8 R/W 00h
48.3.19/
1324
4006_C014 UART FIFO Transmit Count (UART2_TCFIFO) 8 R 00h
48.3.20/
1324
4006_C015 UART FIFO Receive Watermark (UART2_RWFIFO) 8 R/W 01h
48.3.21/
1325
4006_C016 UART FIFO Receive Count (UART2_RCFIFO) 8 R 00h
48.3.22/
1326
4006_C018 UART 7816 Control Register (UART2_C7816) 8 R/W 00h
48.3.23/
1326
4006_C019 UART 7816 Interrupt Enable Register (UART2_IE7816) 8 R/W 00h
48.3.24/
1328
4006_C01A UART 7816 Interrupt Status Register (UART2_IS7816) 8 R/W 00h
48.3.25/
1329
4006_C01B UART 7816 Wait Parameter Register (UART2_WP7816T0) 8 R/W 0Ah
48.3.26/
1331
4006_C01B UART 7816 Wait Parameter Register (UART2_WP7816T1) 8 R/W 0Ah
48.3.27/
1331
4006_C01C UART 7816 Wait N Register (UART2_WN7816) 8 R/W 00h
48.3.28/
1332
4006_C01D UART 7816 Wait FD Register (UART2_WF7816) 8 R/W 01h
48.3.29/
1333
4006_C01E UART 7816 Error Threshold Register (UART2_ET7816) 8 R/W 00h
48.3.30/
1333
4006_C01F UART 7816 Transmit Length Register (UART2_TL7816) 8 R/W 00h
48.3.31/
1334
4006_D000 UART Baud Rate Registers:High (UART3_BDH) 8 R/W 00h
48.3.1/
1300
4006_D001 UART Baud Rate Registers: Low (UART3_BDL) 8 R/W 04h
48.3.2/
1301
4006_D002 UART Control Register 1 (UART3_C1) 8 R/W 00h
48.3.3/
1302
4006_D003 UART Control Register 2 (UART3_C2) 8 R/W 00h
48.3.4/
1303
4006_D004 UART Status Register 1 (UART3_S1) 8 R C0h
48.3.5/
1305
4006_D005 UART Status Register 2 (UART3_S2) 8 R/W 00h
48.3.6/
1308
4006_D006 UART Control Register 3 (UART3_C3) 8 R/W 00h
48.3.7/
1310
Table continues on the next page...
Memory map and registers
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
1298 Freescale Semiconductor, Inc.