Information

48.3.22 UART FIFO Receive Count (UARTx_RCFIFO)
This is a read only register that indicates how many datawords are currently in the receive
buffer/FIFO. It may be read at anytime.
Addresses: UART0_RCFIFO is 4006_A000h base + 16h offset = 4006_A016h
UART1_RCFIFO is 4006_B000h base + 16h offset = 4006_B016h
UART2_RCFIFO is 4006_C000h base + 16h offset = 4006_C016h
UART3_RCFIFO is 4006_D000h base + 16h offset = 4006_D016h
Bit 7 6 5 4 3 2 1 0
Read RXCOUNT
Write
Reset
0 0 0 0 0 0 0 0
UARTx_RCFIFO field descriptions
Field Description
7–0
RXCOUNT
Receive Counter
The value in this register indicates the number of datawords that are in the receive buffer/FIFO. If a
dataword is in the process of being received (i.e. in the receive shift register) it is not included in the
count. This value may be used in conjunction with the PFIFO[RXFIFOSIZE] field to calculate how much
room is left in the receive buffer/FIFO.
48.3.23 UART 7816 Control Register (UARTx_C7816)
The C7816 register is the primary control register for ISO-7816 specific functionality.
This register is specific to 7816 functionality and the values in this register have no effect
on UART operation and should be ignored if ISO_7816E is not set/enabled. This register
may be read at anytime but values should only be changed when the ISO_7816E bit is not
set.
Addresses: UART0_C7816 is 4006_A000h base + 18h offset = 4006_A018h
UART1_C7816 is 4006_B000h base + 18h offset = 4006_B018h
UART2_C7816 is 4006_C000h base + 18h offset = 4006_C018h
UART3_C7816 is 4006_D000h base + 18h offset = 4006_D018h
Bit 7 6 5 4 3 2 1 0
Read 0
ONACK ANACK INIT TTYPE
ISO_7816E
Write
Reset
0 0 0 0 0 0 0 0
Memory map and registers
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
1326 Freescale Semiconductor, Inc.