Information
48.3.24 UART 7816 Interrupt Enable Register (UARTx_IE7816)
The IE7816 register controls which flags result in an interrupt being issued. This register
is specific to 7816 functionality, the corresponding flags that drive the interrupts will not
assert when 7816E is not set/enabled. However, these flags may remain set if they
asserted while 7816E was set and not subsequently cleared. This register maybe read or
written at anytime.
Addresses: UART0_IE7816 is 4006_A000h base + 19h offset = 4006_A019h
UART1_IE7816 is 4006_B000h base + 19h offset = 4006_B019h
UART2_IE7816 is 4006_C000h base + 19h offset = 4006_C019h
UART3_IE7816 is 4006_D000h base + 19h offset = 4006_D019h
Bit 7 6 5 4 3 2 1 0
Read
WTE CWTE BWTE INITDE
0
GTVE TXTE RXTE
Write
Reset
0 0 0 0 0 0 0 0
UARTx_IE7816 field descriptions
Field Description
7
WTE
Wait Timer Interrupt Enable
0 The assertion of the IS7816[WT] bit will not result in the generation of an interrupt.
1 The assertion of the IS7816[WT] bit will result in the generation of an interrupt.
6
CWTE
Character Wait Timer Interrupt Enable
0 The assertion of the IS7816[CWT] bit will not result in the generation of an interrupt.
1 The assertion of the IS7816[CWT] bit will result in the generation of an interrupt.
5
BWTE
Block Wait Timer Interrupt Enable
0 The assertion of the IS7816[BWT] bit will not result in the generation of an interrupt.
1 The assertion of the IS7816[BWT] bit will result in the generation of an interrupt.
4
INITDE
Initial Character Detected Interrupt Enable
0 The assertion of the IS7816[INITD] bit will not result in the generation of an interrupt.
1 The assertion of the IS7816[INITD] bit will result in the generation of an interrupt.
3
Reserved
This read-only field is reserved and always has the value zero.
2
GTVE
Guard Timer Violated Interrupt Enable
0 The assertion of the IS7816[GTV] bit will not result in the generation of an interrupt.
1 The assertion of the IS7816[GTV] bit will result in the generation of an interrupt.
1
TXTE
Transmit Threshold Exceeded Interrupt Enable
0 The assertion of the IS7816[TXT] bit will not result in the generation of an interrupt.
1 The assertion of the IS7816[TXT] bit will result in the generation of an interrupt.
Table continues on the next page...
Memory map and registers
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
1328 Freescale Semiconductor, Inc.