Information

Section Number Title Page
16.2 Memory Map/Register Descriptions.............................................................................................................................341
16.2.1 Crossbar switch (AXBS) slave configuration (MCM_PLASC)..................................................................342
16.2.2 Crossbar switch (AXBS) master configuration (MCM_PLAMC)..............................................................342
16.2.3 SRAM arbitration and protection (MCM_SRAMAP).................................................................................343
16.2.4 Interrupt status register (MCM_ISR)...........................................................................................................344
16.2.5 ETB counter control register (MCM_ETBCC)...........................................................................................345
16.2.6 ETB reload register (MCM_ETBRL)..........................................................................................................346
16.2.7 ETB counter value register (MCM_ETBCNT)...........................................................................................347
16.3 Functional Description..................................................................................................................................................347
16.3.1 Interrupts......................................................................................................................................................347
Chapter 17
Crossbar Switch (AXBS)
17.1 Introduction...................................................................................................................................................................349
17.1.1 Features........................................................................................................................................................349
17.2 Memory Map / Register Definition...............................................................................................................................350
17.2.1 Priority Registers Slave (AXBS_PRSn)......................................................................................................351
17.2.2 Control Register (AXBS_CRSn).................................................................................................................354
17.2.3 Master General Purpose Control Register (AXBS_MGPCRn)...................................................................356
17.3 Functional Description..................................................................................................................................................357
17.3.1 General operation.........................................................................................................................................357
17.3.2 Register coherency.......................................................................................................................................358
17.3.3 Arbitration....................................................................................................................................................358
17.4 Initialization/application information...........................................................................................................................361
Chapter 18
Memory Protection Unit (MPU)
18.1 Introduction...................................................................................................................................................................363
18.2 Overview.......................................................................................................................................................................363
18.2.1 Block Diagram.............................................................................................................................................363
18.2.2 Features........................................................................................................................................................364
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
14 Freescale Semiconductor, Inc.