Information

SDHC_PROCTL field descriptions (continued)
Field Description
9–8
DMAS
DMA Select
This field is valid while DMA (SDMA or ADMA) is enabled and selects the DMA operation.
00 No DMA or simple DMA is selected
01 ADMA1 is selected
10 ADMA2 is selected
11 Reserved
7
CDSS
Card Detect Signal Selection
This bit selects the source for the card detection.
0b Card detection level is selected (for normal purpose)
1b Card detection test level is selected (for test purpose)
6
CDTL
Card Detect Test Level
This is bit is enabled while the CDSS is set to 1 and it indicates card insertion.
0b Card detect test level is 0, no card inserted
1b Card detect test level is 1, card inserted
5–4
EMODE
Endian Mode
The SDHC supports all four endian modes in data transfer.
00b Big endian mode
01b Half word big endian mode
10b Little endian mode
11b Reserved
3
D3CD
DAT3 as Card Detection Pin
If this bit is set, DAT3 should be pulled down to act as a card detection pin. Be cautious when using this
feature, because DAT3 is also a chip-select for the SPI mode. A pulldown on this pin and CMD0 may set
the card into the SPI mode, which the SDHC does not support. Note: Keep this bit set if SDIO interrupt is
used.
0b DAT3 does not monitor card Insertion
1b DAT3 as card detection pin
2–1
DTW
Data Transfer Width
This bit selects the data width of the SD bus for a data transfer. The host driver shall set it to match the
data width of the card. Possible data transfer width is 1-bit, 4-bits or 8-bits.
00b 1-bit mode
01b 4-bit mode
10b 8-bit mode
11b Reserved
0
LCTL
LED Control
This bit, fully controlled by the host driver, is used to caution the user not to remove the card while the
card is being accessed. If the software is going to issue multiple SD commands, this bit can be set during
Table continues on the next page...
Chapter 49 Secured digital host controller (SDHC)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1401