Information

SDHC_AC12ERR field descriptions (continued)
Field Description
7
CNIBAC12E
Command Not Issued By Auto CMD12 Error
Setting this bit to 1 means CMD_wo_DAT is not executed due to an auto CMD12 error (D04-D01) in this
register.
0b No error
1b Not issued
6–5
Reserved
This read-only field is reserved and always has the value zero.
4
AC12IE
Auto CMD12 Index Error
Occurs if the command index error occurs in response to a command.
0b No error
1b Error, the CMD index in response is not CMD12
3
AC12CE
Auto CMD12 CRC Error
Occurs when detecting a CRC error in the command response.
0b No CRC error
1b CRC Error met in auto CMD12 Response
2
AC12EBE
Auto CMD12 End Bit Error
Occurs when detecting that the end bit of command response is 0 which should be 1.
0b No error
1b End bit error generated
1
AC12TOE
Auto CMD12 Timeout Error
Occurs if no response is returned within 64 SDCLK cycles from the end bit of the command. If this bit is
set to 1, the other error status bits (2-4) have no meaning.
0b No error
1b Time out
0
AC12NE
Auto CMD12 Not Executed
If memory multiple block data transfer is not started, due to a command error, this bit is not set because it
is not necessary to issue an auto CMD12. Setting this bit to 1 means the SDHC cannot issue the auto
CMD12 to stop a memory multiple block data transfer due to some error. If this bit is set to 1, other error
status bits (1-4) have no meaning.
0b Executed
1b Not executed
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
1418 Freescale Semiconductor, Inc.