Information

3.9.3.8 SPI Doze Mode

The Doze mode for the SPI module is the same as the Wait and VLPW modes for the

chip.

3.9.3.9 SPI Interrupts

The SPI has multiple sources of interrupt requests. However, these sources are OR'd

together to generate a single interrupt request per SPI module to the interrupt controller.

When an SPI interrupt occurs, read the SPI_SR to determine the exact interrupt source.

3.9.3.10 SPI clocks

This table shows the SPI module clocks and the corresponding chip clocks.

Table 3-68. SPI clock connections

Module clock Chip clock

System Clock Bus Clock

3.9.4 I2C Configuration

This section summarizes how the module has been configured in the chip. For a

comprehensive description of the module itself, see the module’s dedicated chapter.

Signal multiplexing

access

Peripheral

bridge

Module signals

I C

Figure 3-57. I2C configuration

Table 3-69. Reference links to related information

Topic Related module Reference

Full description I

C I

System memory map System memory map

Table continues on the next page...

Chapter 3 Chip Configuration

K20 Sub-Family Reference Manual, Rev. 6, Nov 2011

Freescale Semiconductor, Inc. 143