Information

Table 3-71. Reference links to related information (continued)

Topic Related module Reference

Transfers Crossbar switch Crossbar switch

Signal Multiplexing Port control Signal Multiplexing

3.9.6.1 SDHC clocking

In addition to the system clock, the SDHC needs a clock for the base for the external card

clock. There are four possible clock sources for this clock, selected by the SIM’s SOPT2

• Core/system clock

• MCGPLLCLK or MCGFLLCLK

• EXTAL

• Bypass clock from off-chip (SDHC0_CLKIN)

3.9.6.2 SD bus pullup/pulldown constraints

The SD standard requires the SD bus signals (except the SD clock) to be pulled up during

data transfers. The SDHC also provides a feature of detecting card insertion/removal, by

detecting voltage level changes on DAT[3] of the SD bus. To support this DAT[3] must

be pulled down. To avoid a situation where the SDHC detects voltage changes due to

normal data transfers on the SD bus as card insertion/removal, the interrupt relating to

this event must be disabled after the card has been inserted and detected. It can be re-

enabled after the card is removed.

3.9.7 I

S configuration

This section summarizes how the module has been configured in the chip. For a

comprehensive description of the module itself, see the module’s dedicated chapter.

Chapter 3 Chip Configuration

K20 Sub-Family Reference Manual, Rev. 6, Nov 2011

Freescale Semiconductor, Inc. 147