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ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 80 (12x12) 32-Bit 100 MHz I/O number 52
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I2Sx_IER field descriptions (continued)
Field Description
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0 Corresponding status bit cannot issue interrupt.
1 Corresponding status bit can issue interrupt.
14
RDR0EN
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0 Corresponding status bit cannot issue interrupt.
1 Corresponding status bit can issue interrupt.
13
TDE1EN
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0 Corresponding status bit cannot issue interrupt.
1 Corresponding status bit can issue interrupt.
12
TDE0EN
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0 Corresponding status bit cannot issue interrupt.
1 Corresponding status bit can issue interrupt.
11
ROE1EN
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0 Corresponding status bit cannot issue interrupt.
1 Corresponding status bit can issue interrupt.
10
ROE0EN
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0 Corresponding status bit cannot issue interrupt.
1 Corresponding status bit can issue interrupt.
9
TUE1EN
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0 Corresponding status bit cannot issue interrupt.
1 Corresponding status bit can issue interrupt.
8
TUE0EN
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
0 Corresponding status bit cannot issue interrupt.
1 Corresponding status bit can issue interrupt.
7
TFSEN
Enable Bit.
Each bit controls whether the corresponding status bit in ISR can issue an interrupt to the core or not.
Table continues on the next page...
Chapter 50 Integrated interchip sound (I2S)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1507