Information

52.6.4 Status Register (TSIx_STATUS)
Addresses: TSI0_STATUS is 4004_5000h base + Ch offset = 4004_500Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
ERROF15 ERROF14 ERROF13 ERROF12 ERROF11 ERROF10
ERROF9 ERROF8 ERROF7 ERROF6 ERROF5 ERROF4 ERROF3 ERROF2 ERROF1 ERROF0
W w1c w1c w1c w1c w1c w1c
w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
ORNGF15 ORNGF14 ORNGF13 ORNGF12 ORNGF11 ORNGF10
ORNGF9 ORNGF8 ORNGF7 ORNGF6 ORNGF5 ORNGF4 ORNGF3 ORNGF2 ORNGF1 ORNGF0
W w1c w1c w1c w1c w1c w1c
w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
TSIx_STATUS field descriptions
Field Description
31
ERROF15
TouchSensing Error Flag 15
This bit indicates when the corresponding electrode is shorted to VDD or VSS. If the GENCS[ERIE] bit is
set, an error interrupt is generated. Write a one to clear this bit.
30
ERROF14
TouchSensing Error Flag 14
This bit indicates when the corresponding electrode is shorted to VDD or VSS. If the GENCS[ERIE] bit is
set, an error interrupt is generated. Write a one to clear this bit.
29
ERROF13
TouchSensing Error Flag 13
This bit indicates when the corresponding electrode is shorted to VDD or VSS. If the GENCS[ERIE] bit is
set, an error interrupt is generated. Write a one to clear this bit.
28
ERROF12
TouchSensing Error Flag 12
This bit indicates when the corresponding electrode is shorted to VDD or VSS. If the GENCS[ERIE] bit is
set, an error interrupt is generated. Write a one to clear this bit.
27
ERROF11
TouchSensing Error Flag 11
This bit indicates when the corresponding electrode is shorted to VDD or VSS. If the GENCS[ERIE] bit is
set, an error interrupt is generated. Write a one to clear this bit.
26
ERROF10
TouchSensing Error Flag 10
Table continues on the next page...
Chapter 52 Touch sense input (TSI)
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 1583