Information

Table 5-2. Module clocks (continued)
Module Bus interface clock Internal clocks I/O interface clocks
CRC Bus clock — —
Analog
ADC Bus clock OSCERCLK —
CMP Bus clock — —
DAC Bus clock — —
VREF Bus clock — —
Timers
PDB Bus clock — —
FlexTimers Bus clock MCGFFCLK FTM_CLKINx
PIT Bus clock — —
LPTMR Bus clock LPO, OSCERCLK,
MCGIRCLK, ERCLK32K
—
CMT Bus clock — —
RTC Bus clock EXTAL32 —
Communication interfaces
USB FS OTG System clock USB FS clock —
USB DCD Bus clock — —
FlexCAN Bus clock OSCERCLK —
DSPI Bus clock — DSPI_SCK
I
2
C Bus clock — I2C_SCL
UART0, UART1 System clock — —
UART2-3 Bus clock — —
SDHC System clock SDHC clock SDHC_DCLK
I
2
S Bus clock I
2
S master clock I2S_TX_BCLK,
I2S_RX_BCLK
Human-machine interfaces
GPIO System clock — —
TSI Bus clock LPO, ERCLK32K,
MCGIRCLK
—
5.7.1 PMC 1-kHz LPO clock
The Power Management Controller (PMC) generates a 1-kHz clock that is enabled in all
modes of operation, including all low power modes. This 1-kHz source is commonly
referred to as LPO clock or 1-kHz LPO clock.
Module clocks
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
174 Freescale Semiconductor, Inc.