Information

Chapter 6
Reset and Boot
6.1 Introduction
The following reset sources are supported in this MCU:
Table 6-1. Reset sources
Reset sources Description
POR reset • Power-on reset (POR)
System resets • External pin reset (PIN)
• Low-voltage detect (LVD)
• Computer operating properly (COP) watchdog reset
• Low leakage wakeup (LLWU) reset
• Multipurpose clock generator loss of clock (LOC) reset
• Software reset (SW)
• Lockup reset (LOCKUP)
• EzPort reset
• MDM DAP system reset
Debug reset • JTAG reset
• nTRST reset
Each of the system reset sources, with the exception of the EzPort and MDM-AP reset,
has an associated bit in the system reset status registers (SRSH and SRSL). See the Mode
controller for more details.
The MCU exits reset in functional mode that is controlled by
EZP_CS pin to select
between the single chip (default) or serial flash programming (EzPort) modes. See Boot
options for more details.
6.2 Reset
This section discusses basic reset mechanisms and sources. Some modules that cause
resets can be configured to cause interrupts instead. Consult the individual peripheral
chapters for more information.
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc. 181